In electronic processing systems there are many instances in which it may be necessary or desirable to derive, from a digital number, an analog voltage that is proportional to the digital number. For example, in the operation of Voltage Controlled Oscillators (VCO), an analog voltage value that controls the frequency of oscillation of the VCO may be derived from a frequency control digital signal. Such derivation is called digital-to-analog conversion and the electronic device or circuit that implements this function is called a Digital-to-Analog Converter (DAC). In a traditional current steering implementation of a DAC, analog circuitry may be utilized in which each bit of the digital value controls an appropriately sized current source. For example, for an N-bit DAC there may be N current sources each coupled to one of the bits in the N-bit number and proportionally sized to the binary weight of the corresponding bit. The N current sources may then be coupled to a common resistor, where the voltage across the common resistor is proportional to the value of the N-bit digital number. When a zero (0) value is to be represented, the N current sources may be turned off and no voltage develops across the common resistor. The large area required for an analog-based DAC may be excessively costly for integrated circuits (IC) where most of its components are digital.
When the rate of change of the converted analog signal is low relative to the frequency of operation of the digital circuitry, a DAC may be implemented utilizing mostly digital circuitry. In such a case, the conversion may be accomplished by a first digital stage that generates a digital waveform that has an average duty cycle proportional to the digital value to be converted. This first digital stage is a pulse width modulation operation and a device that implements this operation is called a Pulse Width Modulator (PWM). Duty cycle refers to the fraction of time that the digital waveform is high during a specified period of time or cycle time. A second analog stage in the conversion may require passing the generated digital waveform through a low pass analog filter, resulting in an accurate approximation of the correct analog value from the duty cycle of the digital waveform. In this approach, only the analog filter stage of the DAC may require the implementation of analog components in or external to an IC.
In some instances, while the accuracy of a PWM-based DAC may be sufficient for an application, the resolution provided may be limited by the resolution available in the PWM. Moreover, the spectral properties of a PWM-based DAC may be such that the filtering operation performed by the second analog stage is difficult and costly to implement since a large portion of the AC energy of the digital waveform is concentrated at the PWM output frequency.
In other DAC implementations, for example, a Sigma-Delta (Σ-Δ) DAC, the first digital stage may utilize oversampling and digital filtering to generate a more complex digital waveform which may have desirable spectral properties. This approach may reduce the cost of the second analog stage to filter out the unwanted high frequency components without affecting the desired analog signal. However, the first digital stage in Σ-Δ DACs may be very complex and therefore costly to implement in digital ICs.
Further limitations and disadvantages of conventional and traditional approaches will become apparent to one of skill in the art, through comparison of such systems with some aspects of the present invention as set forth in the remainder of the present application with reference to the drawings.